AI agents that understand hardware: optimize chip designs through self-reflection and graph analysis.
Agentic-HLS introduces a novel approach combining LLMs with Graph Neural Networks for High-Level Synthesis optimization. The system leverages Chain-of-Thought techniques and iterative evaluation to predict performance metrics and resource utilization in hardware design.
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https://arxiv.org/abs/2412.01604
🤖 Original Problem:
High-Level Synthesis (HLS) optimization faces exponential design space complexity due toagma configurations, making manual evaluation time-consuming and inefficient.
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🔧 Solution in this Paper:
→ The system integrates HARP's GNN methodology with LLMs for enhanced prediction capabilities.
→ Chain-of-Thought techniques are employed for classification and regression tasks to analyze source code structures.
→ An iterative predictor-agent system performs self-reflection based on training data batches for three cycles.
→ The architecture combines source code sequencing with graph embeddings to capture critical ign features.
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💡 Key Insights:
→ Chain-of-Thought prompting shows limited effectiveness with smaller models under 100B parameters
→ Graph embeddings significantly improve reasoning about control and data flow relationships
→ Iterative evaluation process enhances prediction reliability thgh self-reflection
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📊 Results:
→ Fine-tuned HARP achieved RMSE of 2.82, outperforming baseline models
→ Agentic-HLS system achieved RMSE of 4.21
→ Integration with GPT4o showed 27% improvement over LLaMA2
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